This disclosure relates to microprocessors and other processing devices and, more particularly, to synchronization of SIMD vectors.
Multiple threads and/or processing units (hereafter referred to as agents), e.g., in systems incorporating multi-threaded processors, multiple processing devices, and/or multi-core processors, may often times need to share resources and data stored within the system. Care is taken to insure that an agent accesses the most recent and up-to-date data and also to insure that an agent does not access and modify data currently associated with another agent. Further complicating this sharing of data and resources, most modern-day processing devices include one or more dedicated cache memories. Within multi-processor and multi-core systems, the multiple on-chip caches will often—and, in practice, generally do—contain multiple copies of a data item. Accordingly, when an agent accesses a copy of a data item, it is insured that an updated or valid data value is read.
Thus, “cache coherency” is maintained in these systems. Cache coherency refers to the synchronization of data written from, or read into, cache memory, such that any data item stored in a cache that is accessed by a thread or processor is the most recent copy of that data item. Further, any data value written from cache back into main memory should be the most current data.
One method of maintaining cache coherency and insuring that, when a data item is needed by an agent, the most up-to-date value for that data item is accessed is to implement a semaphore (e.g., a flag or lock). A lock, for example, comprises a process that is performed in response to a request for a specific data item from memory by an agent (e.g., in a load operation) to insure synchronization between processors and/or threads. Generally, a lock is associated with a set of instructions, including the read/load instruction, an instruction to modify the data item, and a write/store instruction. The lock—also referred to herein as a “lock sequence” or “lock operation”—may, for example, include acquiring ownership of a memory location that stores data, performing an atomic operation on the data while preventing other processes from operating on that data, and releasing ownership of the memory location after the atomic operation is performed. An atomic operation is one that is performed sequentially and in an uninterrupted manner and, further, that is guaranteed to be completed or not completed at all (i.e., the operation is indivisible).
Other features and advantages will be apparent from the description and drawings, and from the claims.